Olawale Akinwale
Olawale Akinwale
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Video with VHDL - Part 3 of 3
This is the first in a three part series on displaying video using VHDL. In this sereis I discuss
Part 1 - Images and image resolution
Part 2 - Display types and how to display things on a display
Part 3 - Practical demonstration of displaying a graphic on a screen using VHDL.
You will find the video ua-cam.com/video/3BJU2drrtCM/v-deo.html
very useful for your understanding of how videos work and the makeup of a display
The FPGA development board used in this video is the Terasic DE10-Lite Board.
The Quartus project and the design powerpoint file and lab instructions mentioned in the video can be found at github.com/wale2oba/video_with_vhdl_1
Переглядів: 237

Відео

Video with VHDL - Part 1 of 3
Переглядів 177Рік тому
This is the first in a three part series on displaying video using VHDL. In this sereis I discuss Part 1 - Images and image resolution Part 2 - Display types and how to display things on a display Part 3 - Practical demonstration of displaying a graphic on a screen using VHDL. You will find the video ua-cam.com/video/3BJU2drrtCM/v-deo.html very useful for your understanding of how videos work a...
Foundations of a Traffic Light Controller FSM
Переглядів 691Рік тому
This video presents the foundations of a VHDL implementation of a traffic light controller. The traffic light controller is a classic example of a finite state machine. The Quartus project and the design powerpoint file and lab instructions mentioned in the video can be found at github.com/wale2oba/tlc1/ Resources that you might find useful: 1. The Intel Manual for the DE10-Lite Board: www.inte...
Finite State Machines in VHDL - Part 3
Переглядів 162Рік тому
This video presents the design of a finite state machine. The FSM designed here is used to display patters on the LEDs of the DE10-Lite Board. The purpose of this video is to teach about how to implement FSMs in VHDL. Resources that you might find useful: 1. The Intel Manual for the DE10-Lite Board: www.intel.com/content/dam/www... 2. The Terasic files that include the DE10-Lite Board's manual ...
Finite State Machines in VHDL - Part 1
Переглядів 140Рік тому
This video presents the design of a finite state machine. The FSM designed here is used to display patters on the LEDs of the DE10-Lite Board. The purpose of this video is to teach about how to implement FSMs in VHDL. Resources that you might find useful: 1. The Intel Manual for the DE10-Lite Board: www.intel.com/content/dam/www... 2. The Terasic files that include the DE10-Lite Board's manual ...
Finite State Machines in VHDL - Part 2
Переглядів 94Рік тому
This video presents the design of a finite state machine. The FSM designed here is used to display patters on the LEDs of the DE10-Lite Board. The purpose of this video is to teach about how to implement FSMs in VHDL. Resources that you might find useful: 1. The Intel Manual for the DE10-Lite Board: www.intel.com/content/dam/www... 2. The Terasic files that include the DE10-Lite Board's manual ...
Introduction to FPGA Programming using Quartus Prime Lite (with Verilog)
Переглядів 979Рік тому
Introductory video into the programming of FPGAs. Specifically, in this video, Quartus Prime Lite is used to program an Intel (Terasic) DE10-Lite Board. Resources used in this video: The Intel lab manual: ftp.intel.com/Public/Pub/fpgaup/pub/Teaching_Materials/current/Laboratory_Exercises/Digital_Logic/verilog/lab1.pdf Terasic's website for information about the board: www.terasic.com.tw/cgi-bin...
Steady State Errors (Part 1 of 3) - Finding the Error
Переглядів 235Рік тому
Steady State Errors (Part 1 of 3) - Finding the Error
Steady State Errors (Part 2 of 3) - System Types
Переглядів 132Рік тому
Steady State Errors (Part 2 of 3) - System Types
Steady State Errors (Part 3) - An Example
Переглядів 146Рік тому
Steady State Errors (Part 3) - An Example
Video with FPGAs
Переглядів 8613 роки тому
This video introduces the programming of an FPGA for displaying things on a screen (VGA, XGA, etc). The Quartus project created in this video and the Matlab file used can be found at github.com/wale2oba/FPGA_Video . Other resources that you might find useful: The Intel Manual for the DE10-Lite Board: www.intel.com/content/dam/www/programmable/us/en/portal/dsn/42/doc-us-dsnbk-42-2912030810549-de...
Counters (Part 7) - Traffic Light Controller FSM
Переглядів 8323 роки тому
This video presents the design of a traffic light controller in VHDL. The controller is defined as a finite state machine. Resources that you might find useful: The Intel Manual for the DE10-Lite Board: www.intel.com/content/dam/www/programmable/us/en/portal/dsn/42/doc-us-dsnbk-42-2912030810549-de10-lite-user-manual.pdf The Terasic files that include the DE10-Lite Board's manual and a control p...
Counters (Part 6) - Counters as State Machines
Переглядів 2743 роки тому
In this video, the synchronous counter is defined as a finite state machine in VHDL. Resources that you might find useful: The Intel Manual for the DE10-Lite Board: www.intel.com/content/dam/www/programmable/us/en/portal/dsn/42/doc-us-dsnbk-42-2912030810549-de10-lite-user-manual.pdf The Terasic files that include the DE10-Lite Board's manual and a control panel for interacting with the board wi...
Counters (Part 5b) - VHDL Structural Architecture vs. Behavioural Architecture
Переглядів 3303 роки тому
A comparison of the logic elements usage for a structural definition and a behavioural definition of a 3-bit synchronous counter with asynchronous inputs. Resources that you might find useful: The Intel Manual for the DE10-Lite Board: www.intel.com/content/dam/www/programmable/us/en/portal/dsn/42/doc-us-dsnbk-42-2912030810549-de10-lite-user-manual.pdf The Terasic files that include the DE10-Lit...
Counters (Part 5) - Synchronous Counters - The Better Way
Переглядів 3783 роки тому
Counters (Part 5) - Synchronous Counters - The Better Way
Counters (Part 4) - Synchronous Counters - Structural VHDL Definition
Переглядів 1 тис.3 роки тому
Counters (Part 4) - Synchronous Counters - Structural VHDL Definition
Counters (Part 3) - Ripple Counters
Переглядів 4603 роки тому
Counters (Part 3) - Ripple Counters
Counters (Part 2) - Testbences in VHDL (Testing the T-Flip-Flop)
Переглядів 9763 роки тому
Counters (Part 2) - Testbences in VHDL (Testing the T-Flip-Flop)
Counters (Part 1) - The T-Flip-Flop
Переглядів 7523 роки тому
Counters (Part 1) - The T-Flip-Flop
With/Select Statements, Case Structures, and If/then/Else Structures
Переглядів 1,2 тис.3 роки тому
With/Select Statements, Case Structures, and If/then/Else Structures
Introduction to FPGA Programming using Quartus Prime Lite (with VHDL)
Переглядів 18 тис.3 роки тому
Introduction to FPGA Programming using Quartus Prime Lite (with VHDL)
03 Matlab Scritps vs. Matlab Functions
Переглядів 4503 роки тому
03 Matlab Scritps vs. Matlab Functions
02 Finding Help in Matlab - An Example
Переглядів 3603 роки тому
02 Finding Help in Matlab - An Example
Matlab Basics 01 - Finding Help in Matlab
Переглядів 4223 роки тому
Matlab Basics 01 - Finding Help in Matlab
EEE407 - Solved Example 2
Переглядів 1843 роки тому
EEE407 - Solved Example 2
EEE407 - Solved Example 1
Переглядів 2353 роки тому
EEE407 - Solved Example 1
15 - Model Analogues
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15 - Model Analogues
14a - Modelling a Mass Spring Damper Part 2
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14a - Modelling a Mass Spring Damper Part 2
14b - Modelling a Mass Spring Damper - Part 2
Переглядів 1673 роки тому
14b - Modelling a Mass Spring Damper - Part 2
13 - Modelling a Mass Spring Damper
Переглядів 2293 роки тому
13 - Modelling a Mass Spring Damper

КОМЕНТАРІ

  • @UFUOMA-OGHENEOTUONIYO
    @UFUOMA-OGHENEOTUONIYO 22 дні тому

    hello sir, I can't seem to find part 2 of the video series on your channel. thank you for your videos, they are extremely helpful

    • @OlawaleAkinwale
      @OlawaleAkinwale 3 дні тому

      @@UFUOMA-OGHENEOTUONIYO I am very sorry for my late response. Please find it here ua-cam.com/video/cimeSqmz2uY/v-deo.htmlsi=2gwOi2XDmoKmWpxX

    • @UFUOMA-OGHENEOTUONIYO
      @UFUOMA-OGHENEOTUONIYO 2 дні тому

      @@OlawaleAkinwale thank you very much sir.

  • @mtopangaprimo2556
    @mtopangaprimo2556 4 місяці тому

    I am sorry to stress you.I followed the execise website you have given above.I can not find videos to the lane detection.I would very much like to learn that part well.

    • @OlawaleAkinwale
      @OlawaleAkinwale 4 місяці тому

      I'm sorry, i don't understand. Could you mention the time in the video were I talked about the "lane detection" so I can remember which exercise that was?

    • @mtopangaprimo2556
      @mtopangaprimo2556 4 місяці тому

      It was not mentioned in your video actually. I just followed the intel link you provided . I then happened to come across that lane detection exercise. So I thught the intel link was your own website page .Am sorry for that confusion. Now I am wishing it was your exercise because you could have saved my Semester😊. But all in all. I will watch all your tutorials and better myself .Thanks once again

    • @OlawaleAkinwale
      @OlawaleAkinwale 4 місяці тому

      @@mtopangaprimo2556 😀 No worries. I wish you the best.

  • @mtopangaprimo2556
    @mtopangaprimo2556 4 місяці тому

    Hallo I want to give you much thanks to everything i learnt on this video.Really.I found the QSF Master file.did the changes like you recommended. I followed along and all my LEDs on fpga worked.I am so glad that you uploaded a full video on such topic from installation to creating ones project, and not short cut videos.Thank you alot.

  • @mtopangaprimo2556
    @mtopangaprimo2556 4 місяці тому

    First thank you for this increadable video.I Have an issue though I can not find that second master qsf file.I got the one you called peenut but not the second one.If its ok to ask, where do i get it because it definately not in my ordner file.Thank you

    • @OlawaleAkinwale
      @OlawaleAkinwale 4 місяці тому

      You are welcome. The master qst file is publicly available on Intel's website. If you do a search for "DE10-Lite Master qsf file" on Bing, you should get the file as the top result. (For example, www.bing.com/search?q=de10-Lite+master+qsf+file). Weirdly, I didn't get the qsf file as the top result in a Google search. If you are still having trouble finding it, please let me know and I can download it and put it in a github repository for you.

  • @em2129
    @em2129 5 місяців тому

    What a legend. Thank you!

  • @rainygorges3403
    @rainygorges3403 6 місяців тому

    😍

  • @icebluscorpion
    @icebluscorpion 6 місяців тому

    Your windo placement of the arm was really stupid. I couldn't see what you have clicked at 5:20. Next time use split screen to not obstruct the view. We aren't in a fogging gaming channel here aren't we?!

    • @OlawaleAkinwale
      @OlawaleAkinwale 6 місяців тому

      Thank you for the feedback. I'm sorry for the error on my part.

  • @edmunns8825
    @edmunns8825 6 місяців тому

    The difference between the case and with statements demonstrates very clearly how FPGAs can be so powerful. These are very good lectures! I built a 4 bit ALU a few years ago at uni, but we did it with just logic gate abstractions in Quartus II, like more of a schematic diagram into abstracted blocks for flip flops or muxs or whatever. I'm getting back into FPGAs now and it's my first look at VHDL, you're a good teacher. I thought I better leave a comment because I hear all the time about people wanting to build a computer in an FPGA and you covered a small introduction to some of the core principles of it in this video. Extremely underrated video IMO.

    • @OlawaleAkinwale
      @OlawaleAkinwale 6 місяців тому

      Thank you.

    • @edmunns8825
      @edmunns8825 6 місяців тому

      @@OlawaleAkinwale Hey man, I hope you don't mind this, I checked out your channel after I watched that video, and I watched the videos of your student groups. Those guys and girls did really interesting projects, I was very impressed. Especially the guys that did the edge detector with sobel kernel, I was very impressed with that. Make sure you keep teaching my friend, you have a gift for this.

    • @OlawaleAkinwale
      @OlawaleAkinwale 6 місяців тому

      @@edmunns8825 I don't mind. The videos are in the public domain. Thank you. Will do.

  • @ssam3826
    @ssam3826 7 місяців тому

    This is such a wonderful message. But sadly the volume is low..plus Pastor could have explained more. Greetings from India.

  • @KyleMartin-vs2zz
    @KyleMartin-vs2zz 7 місяців тому

    I'm not a lab rat move around clown

  • @user-gt3rr8kp5w
    @user-gt3rr8kp5w 8 місяців тому

    I have some experience with Quartus and the DE10 Lite board, so this is a refresh for me. This video is VERY good. It moves at a moderate pace, not too fast. The speaker is very easy to understand and everything is described clearly. Well done!

    • @OlawaleAkinwale
      @OlawaleAkinwale 8 місяців тому

      Thank you very much for the kind words.

  • @Haytithoma
    @Haytithoma 8 місяців тому

    I was expected more of you. Anyone that is appropriate to explain this subject would have been you. I needed the prayer point that was the reason I watched the video but I did not see that. You said you speak to earth when the juju man came. What did you say? The words you stated to earth are the core of this teaching and what the brethren like me needs to fight the battle. We brethren are ignorant to it and most Churches do not know it. Please when God give you opportunity to teach other please do not hide anything. You do not know who is in need of it. Psalms 115:16 earth is given to children of men. The occultist people use it against us due to lack of knowledge.

  • @tascker0
    @tascker0 10 місяців тому

    Many thanks, this was very helpfull and very clear.

  • @asphxdel
    @asphxdel 10 місяців тому

    thank you so much

  • @folorunshonurudeen2564
    @folorunshonurudeen2564 11 місяців тому

    can you help me with my 8bit cpu simulation on quartus, how can i get in touch with you

    • @OlawaleAkinwale
      @OlawaleAkinwale 11 місяців тому

      Hi. You can reach me on Telegram at t.me/olawaleakinwale . I cannot promise to do the work for you but I might be able to provide some guidance to help.

  • @billthekid3634
    @billthekid3634 11 місяців тому

    Perfect!

  • @jeffryiskandar4254
    @jeffryiskandar4254 11 місяців тому

    hey can i ask a question? why my visa cant detect the com/ports?

    • @OlawaleAkinwale
      @OlawaleAkinwale 11 місяців тому

      That's strange. Connect a serial device to one of your COM ports and then restart LabVIEW. If that doesn't work, last resort might be to refresh the LabVIEW installation.

  • @pinkyhendricks8361
    @pinkyhendricks8361 Рік тому

    Dr FRANCIS MYLES BOOKS SPEAK TO THE EARTH

  • @dattu7733
    @dattu7733 Рік тому

    Thank you so much.. Love from India

  • @Lightoverthedarkness7430
    @Lightoverthedarkness7430 Рік тому

    I have just subscribed.I think this will bd helpful for me in my exam. Do you have videos on microprocessor assembly language ?

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      Great to have you here. Unfortunately, I don't have any.

  • @Lightoverthedarkness7430
    @Lightoverthedarkness7430 Рік тому

    Nice lecture bro

  • @unablessington7168
    @unablessington7168 Рік тому

    How do you speak to chemtrails?

  • @hectorvidales876
    @hectorvidales876 Рік тому

    Thank you!

  • @maxwelltaranhike9194
    @maxwelltaranhike9194 Рік тому

    I received exactly the same revelation earlier today as I stood by a river praying. And to stumble upon this teaching is a confirmation miracle for I have never visited this channel before nor heard of the preacher.

  • @SuperJamesw14
    @SuperJamesw14 Рік тому

    Super awesome vid. Clear, easy to follow, helped me complete my project for school. Thank you!

  • @tabithaharawa8717
    @tabithaharawa8717 Рік тому

    Halleluyah

  • @faizanrizvi2233
    @faizanrizvi2233 Рік тому

    Hi, im really enjoying all the vhdl content. Are you a teacher or do you work? Is the job vhdl related, just curious?

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      I'm glad you are finding them useful. Yes, I teach at a university.

    • @faizanrizvi2233
      @faizanrizvi2233 Рік тому

      @@OlawaleAkinwale Good to hear and once again thanks for making the videos!

  • @aanukayode7130
    @aanukayode7130 Рік тому

    I hope this is not coming out on Friday 😃

  • @liairon6273
    @liairon6273 Рік тому

    Wow you’re a God send. What a powerful word in season. Be blessed always

  • @dapoalla
    @dapoalla Рік тому

    My geeky cousin

  • @generationCHRIST.
    @generationCHRIST. Рік тому

    Thank you sir

  • @Me-hg7hh
    @Me-hg7hh Рік тому

    So grateful I came across this pastor. Thoroughly enjoy your preaching. Thank you, from Cape Town

  • @jayeobadamola7356
    @jayeobadamola7356 Рік тому

    Great projects presented here. Great job done here sir

  • @yahndidee-nay8792
    @yahndidee-nay8792 Рік тому

    Thankyou Thankyou Thankyou

  • @jasneetpala1996
    @jasneetpala1996 Рік тому

    Hi, I am finding a little bit problem with the code I designed. I just want to read data from serial port with time. But it looks like labview is not reading the data from the weighing machine. Can you help me with that? I am new to labview with zero background.

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      Hi. You might want to confirm that the serial port is configured correctly to interact with the weighing machine. For example, check of you are using the correct baud rate, the correct number of stop bits, whether or not parity checking is done, and if RTS/CTS is used. These can determine whether or not you are able to successfully interact with an RS-232 device.

  • @mohammadtorkamandehnavi4340

    Hello Thank you so much

  • @engr.inigo.silva2000
    @engr.inigo.silva2000 Рік тому

    Tank you so much!

  • @ashwin372
    @ashwin372 Рік тому

    one of the fluent english speaker from Africa! nice thank you

  • @firewater365
    @firewater365 Рік тому

    Thank you so much.

  • @satyajyothikaperni2589
    @satyajyothikaperni2589 Рік тому

    Sir pls send some information to do programming in quartus prime using verilog

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      Hello @satyajyothikaperni2589 I am much more conversant with VHDL than Verilog. However, I will try to make a Verilog version of this video by Monday. In the mean time, the difference between them is that you will select Verilog HDL instead of VHDL when creating a new file and then the content of the file will be different (different syntax and semantics). Beyond that, everything is just about the same.

    • @satyajyothikaperni2589
      @satyajyothikaperni2589 Рік тому

      @@OlawaleAkinwale Thank you sir

  • @raymondzhao9557
    @raymondzhao9557 Рік тому

    interesting! thanks!

  • @adrikartadinata3206
    @adrikartadinata3206 Рік тому

    Thank you sir, your explanation is really easy to understand

  • @davorhristov6980
    @davorhristov6980 Рік тому

    Could you please attach the matlab writeMIF.m script to the github project somehow?

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      Will do. Please give me a day or so. Working to meet a deadline at present and then I will create the github project.

    • @davorhristov6980
      @davorhristov6980 Рік тому

      @@OlawaleAkinwale okayy thank you soo much

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      @@davorhristov6980 Done. I have added the img2mif.m file to the root folder of the github project. github.com/wale2oba/FPGA_Video/blob/main/img2mif.m

    • @davorhristov6980
      @davorhristov6980 Рік тому

      @@OlawaleAkinwale Okay thank you. I'll try it now to see if I can make it work this time, following the video instructions. I'll let you know how it goes. Thank you again.

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      @@davorhristov6980 I'm glad to be of service. You are welcome.

  • @samb1637
    @samb1637 Рік тому

    How do I get in touch with you?

  • @samb1637
    @samb1637 Рік тому

    Thank you for the amazing video that really helps me a lot. In terms of the master qsf file, how do you download and stored, in what format to be used in the pin assignments?

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      I'm sorry for my late response. I recommend using the system builder program that is on the CD for your FPGA development board. For the DE10-Lite it is on Terasic's website (download.terasic.com/downloads/cd-rom/de10-lite/DE10-Lite_v.2.1.0_SystemCD.zip). In the tools folder, select system builder. It can be used to create the "master.qsf" file or honestly the qd file with just the pin assignments you want. It also creates a Quartus project folder though you can just delete this keep just the qsf file located in the folder.

  • @MUHAMMADADISAAL-YAQEEN
    @MUHAMMADADISAAL-YAQEEN Рік тому

    your videos and brief and detailed, please can you make a video on nortons, thevenin theorem in eee201 and semiconductors and diodes

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      I'll try to. I mo longer teach EEE201 but I will try to make these since some will find them helpful.

    • @MUHAMMADADISAAL-YAQEEN
      @MUHAMMADADISAAL-YAQEEN Рік тому

      @@OlawaleAkinwale that would be a lot helpful, just incase I'm unable to make use of them atm, i will definitely recommend for the upcoming set. is there a way to contact you sir.

    • @OlawaleAkinwale
      @OlawaleAkinwale Рік тому

      @@MUHAMMADADISAAL-YAQEEN t.me/olawaleakinwale . I am sorry for responding late. I wanted to take a while to decide on which of my handles I will be glad to publicly place on my UA-cam videos.

  • @dorismalamamwanza9804
    @dorismalamamwanza9804 Рік тому

    Oh earth, earth, earth, hear the voice of Lord. Release my property and settle me in my own home in Jesus's name. Thank you for listening.